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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
November 2010
FAN5362 3MHz, 500mA / 750mA Synchronous Buck Regulator
Features
3MHz Fixed-Frequency Operation 45A Typical Quiescent Current 1.80 to 3.6V Fixed Output Voltage 500mA or 750mA Output Current Capability 2.7V to 5.5V Input Voltage Range Smooth Transitions to/from 100% Duty Cycle when VIN Drops PFM Mode for High Efficiency in Light Load Best-in-Class Load Transient Response Best-in-Class Efficiency Forced PWM and External Clock Synchronization Internal Soft-Start Input Under-Voltage Lockout (UVLO) Thermal Shutdown and Overload Protection 6-Bump WLCSP, 0.4mm Pitch or 6-Lead 2 x 2mm Ultrathin Molded Leadless Package
Description
The FAN5362 is a 500mA or 705mA, step-down, switching voltage regulator that delivers a fixed output voltage from an input voltage supply of 2.7V to 5.5V. Using a proprietary architecture with synchronous rectification, the FAN5362 is capable of delivering a peak efficiency of 96%, while maintaining efficiency over 90% with load currents as low as 1mA. This regulator transitions seamlessly into and out of 100% duty cycle operation when the supply dips to or below the regulation setpoint and smoothly recovers full regulation without overshoot when the supply recovers. The regulator operates at a nominal fixed frequency of 3MHz, which reduces the value of the external components to 1H for the output inductor and 4.7F for the output capacitor. The PWM modulator can be synchronized to an external frequency source. At moderate and light loads, pulse frequency modulation is used to operate the device in power-save mode with a typical quiescent current of 45A. Even with such a low quiescent current, the part exhibits excellent transient response during large load swings. At higher loads, the system automatically switches to fixed-frequency control, operating at 3MHz. In shutdown mode, the supply current drops below 1A, reducing power consumption. For applications that require minimum ripple or fixed frequency, PFM mode can be disabled using the MODE pin. The FAN5362 is available in 6-bump, 0.4mm pitch, WaferLevel Chip-Scale Package (WLCSP) and 6-Lead 2 x 2mm Ultrathin Molded Leadless Package (UMLP).
Applications
SD Flash Memory Power Supply RF Transeiver Power Cell Phones, Smart Phones Tablets, Netbooks , Ultra-Mobile PCs 3G, LTE, WiMAXTM, WiBro , and WiFi Data Cards Gaming Devices, Digital CamerasDC/DC Micro Modules
(R) (R) (R)
Figure 1. Typical Application
Trademarks are the property of their respective owners.
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1 www.fairchildsemi.com
FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Ordering Information
Part Number
FAN5362UC21X FAN5362UC25X FAN5362UC27X
(2) (2) (2)
Output Voltage
2.1 2.5 2.7 2.9 3.3 2.9 3.3
(1)
Operating Temperature Range
Package
Packing Method
WLCSP-6, 0.4mm Pitch -40 to 85C Tape and Reel
FAN5362UC29X FAN5362UC33X FAN5362UMP29X FAN5362UMP33X
6-Lead, 2 x 2mm UMLP
Note: 1. Other voltage options available on request. Contact a Fairchild representative. 2. Preliminary; not full production release at this time. Contact a Fairchild representative for information.
Table 1. Recommended Components for Circuit in Figure 1 Component
L1 CIN COUT
Description
1H, 2012, 190m, 800mA 2.2F, 6.3V, X5R, 0402 2.2F, 6.3V, X5R, 0603 4.7F, X5R, 0603 10F, X5R, 0603
Example Part
Murata LQM21PN1R0MC0 Murata GRM155R60J225ME15 GRM188R60J225KE19D Murata GRM188R60J475M Murata GRM188R60J106ME47D
Typical
1H 2.2F 4.7F 10.0F
Pin Configuration
Figure 2. WLCSP, Bumps Facing Down
Figure 3. WLCSP, Bumps Facing Up
Pin Definitions
Pin #
A1 B1 C1 C2 B2 A2
Name
MODE SW FB GND EN VIN
Description
Logic 1 on this pin forces the IC to stay in PWM mode. A logic 0 allows the IC to automatically switch to PFM during light loads. The regulator also synchronizes its switching frequency to two times the frequency provided on this pin. Do not leave this pin floating. Switching Node. Connect to output inductor. Feedback / VOUT. Connect to output voltage. Ground. Power and IC ground. All signals are referenced to this pin. Enable. The device is in shutdown mode when voltage to this pin is <0.4V and enabled when >1.2V. Do not leave this pin floating. Input Voltage. Connect to input power source.
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only.
Symbol
VIN VSW VCTRL VFB ESD TJ TSTG TL Input Voltage Voltage on SW Pin EN and MODE Pin Voltage FB Pin Electrostatic Discharge Protection Level Junction Temperature Storage Temperature
Parameter
Min.
-0.3 -0.3 -0.3 -0.3
Max.
6.5 VIN + 0.3 VIN + 0.3 4 3.0 1.5
(3) (3)
Unit
V V V V kV
Human Body Model per JESD22-A114 Charged Device Model per JESD22-C101 -40 -65
+150 +150 +260
C C C
Lead Soldering Temperature, 10 Seconds
Note: 3. Lesser of 6.5V or VIN+0.3V.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
VCC IOUT L CIN COUT TA TJ Supply Voltage Range Output Current for 2.1V
Parameter
Min.
2.7 0 0
(4)
Typ.
Max.
5.5 750 500
Unit
V mA H F
Output Current for 2.5V, 2.7V, 2.9V, 3.3V Inductor Input Capacitor Output Capacitor Operating Ambient Temperature Operating Junction Temperature
1 2.2 10 -40 -40 24 +85 +125
F C C
Note: 4. Minimum VIN = VOUT + 200mV or 2.7V, whichever is greater.
Thermal Properties
Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer 1s2p boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperature TA.
Symbol Parameter
JA Junction-to-Ambient Thermal Resistance WLSCP UMLP
Typical
150 49
Unit
C/W
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Electrical Characteristics
Minimum and maximum values are at VIN = VEN = 2.7V to 5.5V, VMODE = 0V (AUTO Mode), TA = -40C to +85C; circuit of Figure 1, unless otherwise noted. Typical values are at TA = 25C, VIN = VEN = 3.6V, VMODE = 0V, COUT=10F.
Symbol
Power Supplies IQ I(SD) VUVLO VUVHYST V(ENH) V(ENL) I(EN) V(MH) V(ML) I(M) fSW fSYNC
Parameter
Conditions
No Load, Not Switching, VIN > 3V PWM Mode EN = GND Rising VIN
Min.
Typ.
45 5 0.05 2.5 175
Max.
75 1.00 2.6
Unit
A mA A V mV V
Quiescent Current Shutdown Supply Current Under-Voltage Lockout Threshold Under-Voltage Lockout Hysteresis Enable HIGH-Level Input Voltage Enable LOW-Level Input Voltage Enable Input Leakage Current MODE HIGH-Level Input Voltage MODE LOW-Level Input Voltage MODE Input Leakage Current Switching Frequency
(5) (5)
1.05 0.4 EN to VIN or GND 1.05 0.4 MODE to VIN or GND VIN = 3.6V, TA = 25C Square Wave at MODE Input 2.7 1.3 2.037 (-3%) 2.375 (-5%) 2.425 (-3%) -5% -3% 180 330 300 1375 800 1000 150 15 1150 0.01 3.0 1.5 1.00 3.3 1.7 2.163 (+3%) 2.575 (+3%) 2.575 (+3%) +3% +3% 300 0.01 1.00
V A V V A MHz MHz
Switching and Synchronization MODE Synchronization Range
Regulation 2.10V ILOAD = 0 to 750mA ILOAD = 0 to 400mA, VIN VOUT + 200mV ILOAD = 0 to 500mA, VIN VOUT + 300mV ILOAD = 0 to 400mA, VIN VOUT + 150mV ILOAD = 0 to 500mA, VIN VOUT + 300mV From EN Rising Edge VIN = VGS = 3.6V VIN = VGS = 3.6V
(5)
2.100 2.500 2.500
VO
Output Voltage Accuracy
2.50V
V
2.70V, 2.90V, 3.30V tSS Soft-Start PMOS On Resistance NMOS On Resistance PMOS Peak Current Limit Thermal Shutdown Thermal Shutdown Hysteresis
s m m mA mA C C
Output Driver RDS(on) ILIM(OL) TTSD THYS
VOUT = 2.1V VOUT = 2.5V, 2.7V, 2.9V, 3.3V
Notes: 5. Limited by the effect of tOFF minimum (see Figure 7 in Typical Performance Characteristics). 6. The Electrical Characteristics table reflects open-loop data. Refer to the Operation Description and Typical Characteristics for closed-loop data.
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Typical Characteristics
Unless otherwise noted, VIN=VEN=3.6V,VMODE=0 (AUTO), VOUT=2.9V, COUT=10F, and TA=25C.
100% 98% 96% 94%
2.910
2.905
Efficiency
90% 88% 86% 84% 82% 80% 1 10 100 I LOAD Output Current (mA)
VIN = 3.2, Mode=0 VIN = 3.6, Mode=0 VIN = 4.2, Mode=0 VIN = 3.2, Mode=1 VIN = 3.6, Mode=1 VIN = 4.2, Mode=1
VOUT (V)
92%
2.900
2.895
2.890
Auto 3.6VIN Auto 3.2VIN
1000
2.885 100 200 300 400 500 I LOAD Output Current (mA)
Figure 4. Efficiency vs. Load Current and Input Supply
90 80 70 60 50 40 30 20
Figure 5. Load Regulation
3500
3.2VIN_Auto 3.6VIN_AUTO
3000
SwitchingFrequency(kHz)
2500 2000 1500 1000 500
3.2VIN_AUTO 3.6VIN_AUTO 3.6VIN_FPWM 3.2VIN_FPWM
VOUTripple(mVpp)
10
0
0 0 100 200 300 400 500
0
50
100
150
200
250
300
350
400
450
500
Loadcurrent(mA)
LoadCurrent(mA)
Figure 6. Ripple
Figure 7. Effect of tOFF(MIN) on Reducing Switching Frequency
1300
500 450 400 350
PeakInductorCurrent(mA)
100 % d.c.
1200 1100 1000 900 800 700
Load Current (mA)
300 250 200 150 100 50 0 3 3.5
Hysteresis
Always PWM
Always PFM
40C +25C +85C
4
4.5
5
5.5
600 2.5 3.0 3.5 4.0 InputVoltage(V) 4.5 5.0 5.5
Input Voltage(V)
Figure 8. PFM / PWM Boundaries
Figure 9. Peak Inductor Current
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Typical Characteristics
Unless otherwise noted, VIN=VEN=3.6V,VMODE=0 (AUTO), VOUT=2.9V, COUT=10F, and TA=25C.
VOUT
VOUT IL
IL
Figure 10. PFM to PWM Transition at VIN=3.2V, 10s/div. Figure 11. PWM to PFM Transition at VIN=3.2V, 10s/div.
VOUT
VOUT
IL
IL
Figure 12. PFM to PWM Transition at VIN=3.6V, 2s/div. Figure 13. PWM to PFM Transition at VIN=3.6V, 2s/div.
VOUT
VOUT
IL
IL
Figure 14. Regular Switching to 100% Duty Cycle Transition at VIN=3.2V, 5s/div.
Figure 15. 100% Duty Cycle to Regular Switching Transition at VIN=3.2V, 5s/div.
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Typical Characteristics
Unless otherwise noted, VIN=VEN=3.6V,VMODE=0 (AUTO), VOUT=2.9V, COUT=10F, and TA=25C.
VIN VOUT
EN VOUT
IL
IL
Figure 16. Startup Ramping VIN=VEN with 500mA Load, 1ms/div.
Figure 17. Startup and Shutdown through VEN with 500mA Load, 50s/div.
VIN VOUT
VOUT
IL
IL ILOAD
Figure 18. Line Transient at VIN=3.2V to 4.2V, 300mA Load, tRISE=tFALL=10s, 20s/div.
Figure 19. Load Transient 0mA to 150mA, VIN=3.6V, tRISE=tFALL=100ns, 5s/div.
VOUT
VOUT
IL
IL
ILOAD
ILOAD
Figure 20. Load Transient 50mA to 250mA, VIN=3.6V, tRISE=tFALL=100ns, 5s/div.
Figure 21. Load Transient 150mA to 400mA, VIN=3.6V, tRISE=tFALL=100ns, 5s/div.
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Typical Characteristics
Unless otherwise noted, VIN=VEN=3.6V,VMODE=0 (AUTO), VOUT=2.9V, COUT=10F, and TA=25C.
VOUT
VOUT
IL
IL
ILOAD
ILOAD
Figure 22. Load Transient 50mA to 250mA, VIN=3V, tRISE=tFALL=100ns, 5s/div.
Figure 23. Load Transient 150mA to 400mA, VIN=3V, tRISE=tFALL=100ns, 5s/div.
VIN VOUT
IL
Figure 24. Startup Ramping VIN=VEN, into Overload, Load=3, 5ms/div.
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Operation Description
FAN5362 is a 500mA or 750mA, step-down switching voltage regulator that delivers a fixed output voltage from an input voltage supply up to 5.5V. Using a proprietary architecture with synchronous rectification, FAN5362 is capable of delivering a peak efficiency above 96%, while maintaining efficiency above 90% at load currents as low as 1mA. The regulator operates at a nominal frequency of 3MHz at full load, which reduces the value of the external components to 1H for the inductor and 4.7F for the output capacitor. High efficiency is maintained at light load with single-pulse PFM mode. Synchronous rectification is inhibited during soft-start, allowing the IC to start into a pre-charged load. The IC may fail to start if heavy load is applied during startup and/or if excessive COUT is used. This is due to the currentlimit fault response, which protects the IC in the event of an over-current condition present during soft-start. The current required to charge COUT during soft-start is commonly referred to as "displacement current" and given as:
IDISP = C OUT *
where
dV dt
(2)
Control Scheme
The FAN5362 uses a proprietary, non-linear, fixedfrequency PWM modulator to deliver a fast load transient response, while maintaining a constant switching frequency over a wide range of operating conditions. The regulator performance is independent of the output capacitor ESR, allowing for the use of ceramic output capacitors. Although this type of operation normally results in a switching frequency that varies with input voltage and load current, an internal frequency loop holds the switching frequency constant over a large range of input voltages and load currents. For very light loads, the FAN5362 operates in discontinuous current (DCM) single-pulse PFM mode, which produces low output ripple compared with other PFM architectures. Transition between PWM and PFM is seamless, with a glitch of less than 18mV at VOUT during the transition between DCM and CCM modes. Combined with exceptional transient response characteristics, the very low quiescent current of the controller (45A) maintains high efficiency, even at very light loads, while preserving fast transient response for applications requiring tight output regulation.
dV refers to the soft-start slew rate. dt
To prevent shutdown during soft-start, the following condition must be met:
IDISP + ILOAD < IMAX(DC)
(3)
where IMAX(DC) is the maximum load current the IC is guaranteed to support (500mA or 750mA).
MODE Pin
Logic 1 on this pin forces the IC to stay in PWM mode. A logic 0 allows the IC to automatically switch to PFM during light loads. If the MODE pin is toggled, the converter synchronizes its switching frequency to four times the frequency on the mode pin (fMODE). At startup, the mode pin must be held LOW or HIGH for at least 10s to ensure that the converter does not attempt to synchronize to this pin.
Under-Voltage Lockout
When EN is HIGH, the under-voltage lockout keeps the part from operating until the input supply voltage rises high enough to properly operate. This ensures no misbehavior of the regulator during startup or shutdown.
100% Duty Cycle Operation
When VIN approaches VOUT, the regulator increases its duty cycle until 100% duty cycle is reached. As the duty cycle approaches 100%, the switching frequency declines due to the minimum off-time (tOFF(MIN)) of about 35ns imposed by the control circuit. When 100% duty cycle is reached, VOUT follows VIN with a drop-out voltage (VDROPOUT) determined by the total resistance between VIN and VOUT:
VDROPOUT = ILOAD * PMOS R DS(ON) + DCRL
Current Limiting
A heavy load or short circuit on the output causes the current in the inductor to increase until a maximum current threshold is reached in the high-side switch. Upon reaching this point, the high-side switch turns off, preventing high currents from causing damage. 16 consecutive PWM cycles in current limit causes the regulator to shut down and stay off for about 2900s before attempting a restart. In the event of a short circuit, the soft-start circuit attempts to restart at 240s, which results in a duty cycle of less than 10%, providing current into a short. The closed-loop peak-current limit, ILIM(PK), is not the same as the open-loop tested current limit, ILIM(OL), in the Electrical Characteristics table. This is primarily due to the effect of propagation delays of the IC current limit comparator.
(
)
(1)
To calculate the worst-case VDROPOUT, use the maximum PMOS RDS(ON) at high temperature from Figure 5.
Enable and Soft Start
When the EN pin is LOW, the IC is shut down and the part draws very little current. In addition, during shutdown, FB is actively discharged to ground through a 230 path. Raising EN above its threshold voltage activates the part and starts the soft-start cycle. During soft-start, the internal reference is ramped using an exponential RC shape to prevent any overshoot of the output voltage. Current limiting minimizes inrush during soft-start.
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Thermal Shutdown
When the die temperature increases, due to a high load condition and/or a high ambient temperature, the output switching is disabled until the temperature on the die has fallen sufficiently. The junction temperature at which the thermal shutdown activates is nominally 150C with a 20C hysteresis.
The FAN5362 is optimized for operation with L=1H, but is stable with inductances up to 1.5H (nominal) and down to 470nH. The inductor should be rated to maintain at least 80% of its value at ILIM(PK). Failure to do so lowers the amount of DC current that the IC can deliver. Efficiency is affected by the inductor DCR and inductance value. Decreasing the inductor value for a given physical size typically decreases the DCR; but since I increases, the RMS current increases, as do the core and skin effect losses.
IRMS = IOUT(DC) 2 + I2 12
Minimum Off-Time Effect on Switching Frequency
tOFF(MIN) is 35ns. This imposes constraints on the maximum VOUT that the FAN5362 can provide, or the maximum VIN output voltage it can provide at low VOUT while maintaining a fixed switching frequency in PWM mode. When VIN is high, fixed switching is maintained as long as VOUT 1 - tOFF ( MIN ) * fSW 0.7 . VIN The switching frequency drops when the regulator cannot provide sufficient duty cycle at 3MHz to maintain regulation. This occurs when VIN is below 3.3V at nominal load currents. The calculation for switching frequency is given by:
1 fSW = min , 3MHz t SW (MAX)
(8)
The increased RMS current produces higher losses through the RDS(ON) of the IC MOSFETs as well as the inductor ESR. Increasing the inductor value produces lower RMS currents, but degrades transient response. For a given physical inductor size, increased inductance usually results in an inductor with lower saturation current and higher DCR.
Inductor Current Rating
The FAN5362's current limit circuit can allow a peak current of 1.25A to flow through L1 under worst-case conditions. If it is possible for the load to draw that much continuous current, the inductor should be capable of sustaining that current or failing in a safe manner.
(4)
Output Capacitor

where:
VOUT + IOUT * R OFF t SW (MAX) = 35ns * 1 + VIN - IOUT * R ON - VOUT
(5)
While 4.7F capacitors are available in 0402 package size, 0603 capacitors are recommended due to the severe DC voltage bias degradation in capacitance value that the 0402 exhibits. Increasing COUT has no effect on loop stability and can therefore be increased to reduce output voltage ripple or to improve transient response. Output voltage ripple, VOUT, is: 1 VOUT = I * + ESR 8 *C * fSW OUT (9)
where: ROFF = RDSON _ N + DCRL R ON = RDSON _ P + DCRL
Applications Information
Selecting the Inductor
The output inductor must meet both the required inductance and the energy handling capability of the application. The inductor value affects the average current limit, the PWM-to-PFM transition point, the output voltage ripple, and the efficiency. The ripple current (I) of the regulator is: I VOUT VIN - VOUT * L*f VIN SW (6)
If values greater than 24F of COUT are used, the regulator may fail to start. See the sections on Enable and Soft Start for more information.
Input Capacitor
The 2.2F ceramic input capacitor should be placed as close as possible to the VIN pin and GND to minimize the parasitic inductance. If a long wire is used to bring power to the IC, additional "bulk" capacitance (electrolytic or tantalum) should be placed between CIN and the power source lead to reduce ringing that can occur between the inductance of the power source leads and CIN.
The maximum average load current, IMAX(LOAD) is related to the peak current limit, ILIM(PK) by the ripple current: IMAX(LOAD ) = ILIM(PK ) - I 2 (7)
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
PCB Layout Guidelines
There are only three external components: the inductor, input capacitor, and the output capacitor. For any buck switcher IC, including the FAN5362, it is important to place a low-ESR input capacitor very close to the IC, as shown in Figure 25. The input capacitor ensures good input decoupling, which helps reduce noise appearing at the output terminals and ensures that the control sections of the IC do not behave erratically due to excessive noise. This reduces switching cycle jitter and ensures good overall performance. It is important to place the common GND of CIN and COUT as close as possible to the C2 terminal. There is some flexibility in moving the inductor further away from the IC; in that case, VOUT should be considered at the COUT terminal.
A1 A2
0402 CAP
B1 B2
L1 0805 (2012)
C1 C2
0603 COUT
Figure 25. PCB Layout Recommendation
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Physical Dimensions
0.03 C 2X BALL A1 INDEX AREA F E A B A1 0.40
(O0.30) Solder Mask Opening
0.40
(O0.20) Cu Pad
D
F 0.03 C 2X
TOP VIEW
0.06 C 0.05 C 0.625 0.547 E
RECOMMENDED LAND PATTERN (NSMD PAD TYPE)
0.3780.018 0.2080.021
C
SEATING PLANE
D
SIDE VIEWS
O0.2600.010 6X 0.40 C B A 12 (X) +/-0.018 F 0.005 (Y) +/-0.018 CAB
NOTES:
A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASMEY14.5M, 1994. D. DATUM C, THE SEATING PLANE IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. E. PACKAGE TYPICAL HEIGHT IS 586 MICRONS 39 MICRONS (547-625 MICRONS). F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. DRAWING FILENAME: UC006ACrev4.
0.40
BOTTOM VIEW
Figure 26. 6-Ball, Wafer-Level Chip-Scale Package (WLCSP), 2x3 Array, 0.4mm Pitch, 250m Ball
Product-Specific Dimensions
Product
FAN5362UCX
D
1.310 +/-0.030
E
0.960 +/-0.030
X
0.280
Y
0.255
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
Physical Dimensions
0.10 C
2X
2.0
A B
2.0
6
1.60 1.50
4
0.50 0.10 C PIN1 IDENT
2X TOP VIEW
1.10
1.40
2.40
1
3
0.55 MAX 0.10 C 0.08 C (0.15)
0.65
0.30
0.05 0.00
RECOMMENDED LAND PATTERN
C
SEATING PLANE
SIDE VIEW
NOTES:
PIN1 IDENT
1
1.50 MAX
3
A. OUTLINE BASED ON JEDEC REGISTRATION MO-229, VARIATION VCCC. B. DIMENSIONS ARE IN MILLIMETERS.
1.10 MAX
6x
0.35 0.25
6 4
C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. D. DRAWING FILENAME: MKT-UMLP06Crev1
0.65 1.30
0.35 6x 0.25 0.10 C A B 0.05 C
BOTTOM VIEW
6-Lead, 2 x 2mm, Ultra-Thin Molded Leadless Package (UMLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
www.fairchildsemi.com 13
FAN5362 -- 3MHz, 500mA / 750mA Synchronous Buck Regulator
(c) 2009 Fairchild Semiconductor Corporation FAN5362 * Rev. 1.0.1
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